RAVI PAYAL, K BHAGIRATH. Simulation and Synthesis Model of SPI Bus using Verilog HDL. Journal of Informatics Education and Research, [S. l.], v. 5, n. 4, 2025. Disponível em: http://jier.org/index.php/journal/article/view/4081. Acesso em: 13 mar. 2026.